GROUPCONV ATLAS · RTX 4090 · FP32

Which shapes
reward a custom kernel?

Grouped convolution, measured across the whole map.

Four CUDA implementations, eighty shapes, two timing boundaries. k3 computes four adjacent outputs per thread and improves on the direct kernel. Against tuned PyTorch, the advantage survives only in part of the map.

Explore the 80-shape map

Same kernel. Change the baseline.
Direct CUDA / k33.87×

A substantial improvement over k0.

Tuned PyTorch / k30.74×

The 80-shape geometric mean favors the library.

Graph device timing · geometric mean of 80 shapes. Baseline latency ÷ k3 latency; above 1× favors k3.

  • 80fixed shapes
  • 430 / 480numerically correct · 50 unsupported
  • 10 × 30batches × samples per supported record

SHAPE · BASELINE · TIMING BOUNDARY

Change the clock.
The map changes.

Start with k3 against tuned PyTorch. Switch from graph-device timing to the synchronized API, then select a shape to compare both readings side by side.

Reading the measured map of 80 shapes…

CUDA · MAPPING · DATA REUSE

Reuse the data.
Account for the cost.

These are four implementations with different work assignments. Shared memory adds cooperation and synchronization; keeping four neighboring outputs in one thread makes a different tradeoff.

k080/80

Direct mapping

Recover coordinates from each output index; support general convolution geometry.

Output index → one thread
k180/80

Spatial mapping

Specialize the geometry and map threads to output space, reducing general indexing work.

Output plane → spatial mapping
k230/80

A cooperative shared halo

Load the input tile and its halo together, then read shared memory. Supports 1, 2 or 4 channels per group.

Dashed: shared input tile + halo
k380/80

One thread, four outputs

Compute four adjacent horizontal outputs in one thread and reuse overlapping input windows.

Overlapping input → four outputs

Diagrams illustrate work assignment and reuse, not thread counts or hardware layout. Counts show support within the 80-shape Atlas.

MEASURED TRADEOFF

Across six supported Nsight examples, k2 is shorter than k1 at two points and longer at four. The shared halo is useful work with a cost, not a guaranteed speedup.

Single profiling captures help inspect the mechanism; the Atlas uses ordinary timed batches for its confidence classifications.

Read the counters and machine-code evidence

MOBILENETV2 · FEATURES[3] · ONE CONVOLUTION

Put it back in the block.
Measure again.

A useful kernel must survive the surrounding work. In a MobileNetV2 block, one convolution is replaced by k3 while the rest of the block stays in place.

MobileNetV2 · features[3]original block / one k3 substitution

Graph device

1.14×WIN

Device events inside CUDA Graph
1.13849×

Synchronized API

0.68×LOSS

The call, including synchronization
0.67902×

The graph keeps a 1.14× gain. The synchronized call falls to 0.68×.

Ratios compare the entire block, with random weights and one replaced convolution. Ten paired batches; 95% bootstrap intervals; 5% practical threshold. Model accuracy and whole-network speed were not evaluated.

Inspect the module result

SOURCE · METHOD · RECORDS

From one cell
back to the measurement.

Every cell keeps its shape, comparison, interval and status. The public repository contains the kernels, analysis and reproduction commands; the site reads the same audited records.

  1. 01
    Fix the experiment

    FP32 · contiguous NCHW · 3×3 · stride and dilation 1 · padding 1 · no bias.

  2. 02
    Verify before timing

    Full-output numerical checks and independent FP64 points; unsupported cases remain in the record.

  3. 03
    Keep the sampling boundary

    Ten paired batches, 95% bootstrap intervals and a 5% practical threshold describe this session.

What was verified
The current RTX 4090 Atlas audits 80 shapes, complete output checks and separate graph/API comparisons.
Evidence class
Measured results, deterministic website aggregates and historical device sessions remain distinct.
Boundary
The custom kernel does not beat tuned PyTorch overall. Module probes do not establish whole-model speedup or accuracy, and sustainable roofline bounds remain unestablished.
Files, hashes and methods
  • /case-studies/groupconv-atlas/rtx4090-atlas.jsonCommit-local file · unpublishedSHA-256: 098a722a9cc72563f75d6a285e4953b6c57e972432b9a86ef4873585c7da79cd
  • /case-studies/groupconv-atlas/rtx4090-shapes.jsonCommit-local file · unpublishedSHA-256: 904644af9daa5ea9bb5e9c32a53b24f1981618f9bc8baf14957d17f684a0ba18
  • /case-studies/groupconv-atlas/map-details.jsonCommit-local file · unpublishedSHA-256: b3e2358b855add84420521efde20e2ec7402ae60b6b8b4cea2466fa8d49863a4
  • /case-studies/groupconv-atlas/atlas.jsonCommit-local file · unpublishedSHA-256: ba505546a2568d8251a19b7f549fe66197f8ccc9428ea126f74b7c8a60a33d27
  • /case-studies/groupconv-atlas/current-evidence.mdCommit-local file · unpublishedSHA-256: c13925190954b6be27139f3fb83f36983114c195e06dd0022e07a200d8f8d961
  • /case-studies/groupconv-atlas/provenance.jsonCommit-local file · unpublishedSHA-256: 317e77a65c3154902ca72e725c9517ee8793c326c7ba1f7da2403cbf94de6742

RTX 4090 · 8 September 2026. Historical RTX 4090 D and Apple OpenCL runs are separate. Code: MIT; data and figures: CC BY 4.0, Xiangguo Zhang.

Architecture

Designed and implemented the grouped-convolution kernels, built the numerical validation and benchmark pipeline, and analyzed performance across shapes and timing boundaries.

  1. Freeze shapes

    Record NCHW geometry, groups and support limits before measurement.

  2. Check outputs

    Compare complete FP32 outputs; keep independent FP64 checks separate.

  3. Measure twice

    Graph-internal CUDA events and synchronized eager API measure different boundaries.

  4. Keep the map

    Inspect shape-level results, including regressions and unsupported cases.

Results

The Atlas keeps every supported and unsupported result visible. Ratios above one favor the candidate; ten paired batches support within-session bootstrap classification.

Limitations

  1. No overall advantage over tuned PyTorch; graph timing is not eager kernel timing.

  2. A fixed MobileNetV2 block substitution won graph timing at N=4 (1.13849×), but lost synchronized eager API at N=1 and N=4. Random weights; no model accuracy evaluation.

  3. Frontend, Triton and Nsight evidence was audited separately on RTX 4090. Historical RTX 4090 D and Apple OpenCL remain separate; sustainable roofline bounds are not established.